dgs-1210-10p

D-Link DGS-1210-10P (rev F, R)

The DGS-1210-10P (rev F, R) is a 8 + 2-port Gigabit L2 switch with up to 65 Watts of PoE power on the 8 Gigabit ports. This model is part of the DGS-1210 series line-up.

  • Macronix MX25L25635F (32 MiB flash)
  • 128 MiB (256 MiB Nanya NT5CC256M8JQ-EK on R1) RAM
  • RTL8231 GPIO extender to control the port LEDs, system LED, SFP auxiliary signals, a reset button and a mode switch button for the PoE. Both buttons are software controlled.
  • Nuvoton M0516LDE ARM microcontroller to service the PoE controller
  • Broadcom BCM59121B0KMLG PoE controller

2 Uplink ports are SFP cages which support 1000 Base-X mini GBIC modules.

Power is supplied via a 54V 1.6A barrel connector. PoE budget is 65 W with 30 W maximum per port.

A Serial header is found at J8. Pins are Vcc(3.3V, Square), TX, RX and GND. Serial connection is via 115200 baud, 8N1.

The exchange between the ARM microcontroller and the RTL SoC can be snooped by connecting a logic analyzer to header J9. Square pin is 3.3V, the middle pins are TX from SoC and ARM chip respectively, the pin opposite of Vcc is GND.

Soc UART

  • J3.1: VCC, 3.3V (square pad)
  • J3.2: TX
  • J3.3: RX
  • J4.4: GND

PoE UART

The secondary UART on the SoC is used to communicate with the microcontroller to manage PoE. The communications are accessible from J9, which is in the microcontroller's power domain. Note that the SoC is in an isolated power domain, so avoid connecting the VCC or GND lines together.

  • J9.1: VCC, 3.3V
  • J9.2: TX (microcontroller to SoC)
  • J9.3: RX (SoC to microcontroller)
  • J9.4: GND

Nuvoton SWD

J10 is an SWD header to program the Nuvoton Chip.

dgs-1210-10p_board.jpg

The switch ships with a bootloader based on Realtek's SDK for RTL83xx SoCs and Linux 2.6 based on Realtek's SDK. It has a web interface for all management functions. The board identifies as RTL8380M_INTPHY_2FIB_1G_DEMO (Port Count: 10) for the Realtek SDK.

There is complete hardware support in an experimental OpenWrt branch for F1 revision (R1 is in the works). Of the L2 features, port isolation, 4096 VLANs, Local Port Mirroring, EEE are supported. Support to do configuration of PoE+ (including prioritizing power for ports) is possible with realtek-poe. Media change is detected on the SFP cages for fibre optic cables, however after hot-swapping an SFP module, manual setup is needed. There is no support to read the SFP ID/Sensor data via I2C. Original features such as cable integrity tests, offloaded remote mirroring and Port-ACLs are not yet supported.

  • dgs-1210-10p.txt
  • Last modified: 2021/09/19 19:03
  • by pfertser