 /***************************************************************************************
 *      Copyright(c) 2014 ECONET Incorporation All rights reserved.
 *
 *      This is unpublished proprietary source code of ECONET Incorporation
 *
 *      The copyright notice above does not evidence any actual or intended
 *      publication of such source code.
 ***************************************************************************************
 */

/*======================================================================================
 * MODULE NAME: scu
 * FILE NAME: ecnt_scu.h
 * DATE: 2019/08/15
 * VERSION: 1.00
 * PURPOSE: 
 * NOTES:
 *
 * AUTHOR :          REVIEWED by
 *
 * FUNCTIONS
 *
 *
 * DEPENDENCIES
 *
 * * $History: $
 * MODIFICTION HISTORY:
 * Version 1.00
 * ** This is the first versoin for creating to support the functions of
 *    current module.
 *
 *======================================================================================
 */

#ifndef __ECNT_SCU_H__
#define __ECNT_SCU_H__

/* INCLUDE FILE DECLARATIONS --------------------------------------------------------- */

/* NAMING CONSTANT DECLARATIONS ------------------------------------------------------ */

/* MACRO DECLARATIONS ---------------------------------------------------------------- */
/* CHIP SCU */
#define CR_NP_SCU_BASE                  (0x00000000)
#define CR_CHIP_SCU_BASE				(0x00000000)

typedef union {
	struct {
		unsigned int	packageID			: 4 ;
		unsigned int	isDDR4				: 1 ;
		unsigned int	isSecureHwTrapEn	: 1 ; /* secure HW trap */
		unsigned int	isSecureModeEn		: 1 ; /* RSA key has been written or not */
		unsigned int	isCtrlEcc			: 1 ;
		unsigned int	isFpga				: 1 ;
		unsigned int	sys_clk				: 9; /* bus clock can support up to 512MHz */
		unsigned int	dram_size			: 8; /* Unit = 16MB, DRAM size can support up to 2048MB */
		unsigned int	resv				: 6 ;
	} raw ;
	unsigned int word;
} SYS_GLOBAL_PARM_T ;

/* CHIP SCU registers */
#define CR_CHIP_SCU_SPI_CLK			            (CR_CHIP_SCU_BASE + 0x1B8)
#define CR_CHIP_SCU_NP_PER_DOM_CLK_GAT_1		(CR_CHIP_SCU_BASE + 0x1DC)
#define CR_CHIP_SCU_TOD_DIVIDER_ENABLE		    (CR_CHIP_SCU_BASE + 0x1E4)
#define CR_CHIP_SCU_IOMUX_CTRL_1	(CR_CHIP_SCU_BASE + 0x210)
#define CR_CHIP_SCU_IOMUX_CTRL_2	(CR_CHIP_SCU_BASE + 0x214)
#define CR_CHIP_SCU_IOMUX_CTRL_3	(CR_CHIP_SCU_BASE + 0x218)
#define RG_PON_I2C_MODE		        (CR_CHIP_SCU_BASE + 0x210)
#define RG_FORCE_GPIO2_EN	        (CR_CHIP_SCU_BASE + 0x224)

#endif /* ifndef __ECNT_SCU_H__ */

